From the data converter to the mixer, the process module includes converters (ADCs or DACs), analog filters, and IF amplifiers. The RF stage deals with the RF signal, which generally includes the signal frequency range of 700 MHz to 3.8 GHz in the current LTE standard.Īfter the mixer, modulator, or demodulator-which are all frequency shifting stages-the RF signal will be shifted to a lower frequency around dc to less than 300 MHz. Typical block diagram of transmitter or receiver. & amp amp amp amp amp amp lt img src=' ' alt='Figure 1'& amp amp amp amp amp amp gt įigure 1. In modern digital mobile communication systems, the transmission and receive paths (including observation receive path in the following description) can be divided into three major stages based on the signal’s properties: the RF stage, the analog IF stage, and the digital IF stage.įigure 1 shows the block diagram of typical transmitter and receiver. Please omit the signal flow direction if it causes confusion. Note that this article will focus on digital processing blocks in ADCs and DACs, so the transmitter and receiver blocks are combined in some descriptions. This article will hopefully give a clear view of DDC and DUC functionality in data converters and enable system designers to fully utilize the benefits that ADI converters can provide to the transceiver architecture. Digital signal processing blocks in converters provide valuable benefits to system designs, but these benefits are still not widely understood by many engineers. More and more such converters are integrated with complex digital signal processing blocks to simplify the FPGA’s work in the system design. High speed converters are one of the key functions in a modern wireless base station system. This article explores the integrated DDC and DUC channels in ADI’s IF and RF converters and explains how they work in real-world applications. ADI is integrating more and more of these digital IF processing blocks into high speed converter ICs, which significantly relieves design work and provides cost and power savings in the system. These digital functions can be realized in DSPs and FPGAs and some big companies also build their own digital IF processing ASICs. Functional processing blocks that are now being utilized in data conversion architectures to achieve faster data rates are digital IF processing, DDC (digital downconverter), and DUC (digital upconverter).
To meet the ever increasing data demands of smartphone functionality, the infrastructure architecture of modern digital mobile communication systems must constantly evolve to accommodate wider bandwidths and faster data conversion.
Digital Signal Processing in IF/RF Data Converters
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